25 static char *
native_name[] = {
"CPU_CLK",
"FLOPS",
"TOT_INS",
"BR_MSP", NULL
28 #elif defined(_POWER4) || defined(_PPC970) 31 {
"PM_FPU0_FDIV",
"PM_FPU1_FDIV",
"PM_FPU0_FRSP_FCONV",
33 "PM_FPU0_FMA",
"PM_FPU1_FMA",
"PM_INST_CMPL",
"PM_CYC", NULL
36 #elif defined(_POWER5p) 39 {
"PM_FPU_FULL_CYC",
"PM_CMPLU_STALL_FDIV",
"PM_CMPLU_STALL_FPU",
40 "PM_RUN_INST_CMPL",
"PM_RUN_CYC", NULL
44 #elif defined(_POWER5) 47 {
"PM_FPU_FDIV",
"PM_FPU_FMA",
"PM_FPU_FMOV_FEST",
"PM_FPU_FEST",
48 "PM_INST_CMPL",
"PM_RUN_CYC", NULL
53 {
"PM_IC_MISS",
"PM_FPU1_CMPL",
"PM_LD_MISS_L1",
"PM_LD_CMPL",
54 "PM_FPU0_CMPL",
"PM_CYC",
"PM_TLB_MISS", NULL
57 #elif defined(__ia64__) 60 {
"CPU_CYCLES",
"L1I_READS",
"L1D_READS_SET0",
"IA64_INST_RETIRED", NULL
64 {
"DEPENDENCY_SCOREBOARD_CYCLE",
"DEPENDENCY_ALL_CYCLE",
65 "UNSTALLED_BACKEND_CYCLE",
"MEMORY_CYCLE", NULL
69 #elif ((defined(linux) && (defined(__i386__) || (defined __x86_64__))) ) 70 static char *p3_native_name[] = {
"DATA_MEM_REFS",
"DCU_LINES_IN", NULL };
71 static char *core_native_name[] = {
"UnhltCore_Cycles",
"Instr_Retired", NULL };
72 static char *k7_native_name[] =
73 {
"TOT_CYC",
"IC_MISSES",
"DC_ACCESSES",
"DC_MISSES", NULL };
75 static char *k8_native_name[] =
76 {
"DISPATCHED_FPU:OPS_ADD",
"DISPATCHED_FPU:OPS_MULTIPLY",
77 "DISPATCHED_FPU:OPS_STORE",
"CYCLES_NO_FPU_OPS_RETIRED", NULL };
78 static char *p4_native_name[] =
79 {
"retired_mispred_branch_type:CONDITIONAL",
"resource_stall:SBFULL",
80 "tc_ms_xfer:CISC",
"instr_retired:BOGUSNTAG:BOGUSTAG",
81 "BSQ_cache_reference:RD_2ndL_HITS", NULL
85 #elif defined(mips) && defined(sgi) 86 static char *
native_name[] = {
"Primary_instruction_cache_misses",
87 "Primary_data_cache_misses", NULL
89 #elif defined(mips) && defined(linux) 91 #elif defined(sun) && defined(sparc) 92 static char *
native_name[] = {
"Cycle_cnt",
"Instr_cnt", NULL };
96 {
"BGL_UPC_PU0_PREF_STREAM_HIT",
"BGL_PAPI_TIMEBASE",
97 "BGL_UPC_PU1_PREF_STREAM_HIT", NULL };
99 #elif defined(__bgp__) 101 {
"PNE_BGP_PU0_JPIPE_LOGICAL_OPS",
"PNE_BGP_PU0_JPIPE_LOGICAL_OPS",
102 "PNE_BGP_PU2_IPIPE_INSTRUCTIONS", NULL };
105 #error "Architecture not supported in test file." 130 #if ((defined(linux) && (defined(__i386__) || (defined __x86_64__))) ) 131 if ( !strncmp( hwinfo->
model_string,
"Intel Pentium 4", 15 ) ) {
133 }
else if ( !strncmp( hwinfo->
model_string,
"AMD K7", 6 ) ) {
135 }
else if ( !strncmp( hwinfo->
model_string,
"AMD K8", 6 ) ) {
137 }
else if ( !strncmp( hwinfo->
model_string,
"Intel Core", 17 ) ||
138 !strncmp( hwinfo->
model_string,
"Intel Core 2", 17 ) ) {
164 fprintf( stderr,
"\n" );
int PAPI_stop(int EventSet, long long *values)
void test_pass(const char *filename)
int PAPI_add_event(int EventSet, int EventCode)
int PAPI_event_name_to_code(const char *in, int *out)
int PAPI_library_init(int version)
int main(int argc, char **argv)
char model_string[PAPI_MAX_STR_LEN]
int PAPI_cleanup_eventset(int EventSet)
int PAPI_create_eventset(int *EventSet)
int tests_quiet(int argc, char **argv)
void test_fail(const char *file, int line, const char *call, int retval)
int PAPI_destroy_eventset(int *EventSet)
int PAPI_start(int EventSet)
const PAPI_hw_info_t * PAPI_get_hardware_info(void)
static long long values[NUM_EVENTS]